1. Field of the Invention
The present disclosure relates to a spread spectrum clock generator (SSCG) circuit.
2. Description of the Related Art
In the technology field of clock generation circuits, the “spread spectrum clock generator (SSCG) circuit” has already been known to prevent generation of EMI (radiated electromagnetic interference) that has a peak at a specific frequency. The SSCG circuit slightly modulates the frequency of a clock signal (spreads the spectrum) so as to disperse the energy of EMI having a peak at a specific frequency, and to reduce the peak value.
However, conventional SSCG circuits have a problem in that they may be a source of a long cycle noise that is generated if the synchronization signal (for example, a main scanning synchronization signal) is not synchronized with the cycle of a spread spectrum modulation (an SS modulation).
As countermeasures to this problem, Patent Document 1 proposes a method for resetting an SSCG circuit every synchronization signal. However, this method may disturb the frequency just after the reset, which makes the clock unstable.
As additional countermeasures to this problem, a method has been proposed that makes the SS modulation cycle coincide with an integer multiple of the cycle of a predetermined synchronization signal, without resetting the SSCG circuit (Patent Document 2).
However, by the configuration in Patent Document 2, the SS modulation cycle error may be not removed completely, to remain to a certain extent.